EDI8F24128C 128kx24 sram module 1 EDI8F24128C rev. 5.0 4/96 eco #7470 features pin configurations and block diagram 128kx24 static ram cmos, high speed module the EDI8F24128C is a high speed 3 megabit static ram module organized as 128k words by 24 bits. this module is constructed from three 128kx8 static rams in soj packages on an epoxy laminate (fr4) board. three chip selects (e?-e2) are used to independently enable the three bytes. reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. the EDI8F24128C is offered in 60 pin zip package, which enable three megabits of memory to be placed in less than 0.75 square inches of board space. all inputs and outputs are ttl compatible and operate from a single 5v supply. fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use. 128kx24 bit cmos static random access memory ? access times 20, 25, and 35ns ? individual byte selects ? fully static, no clocks ? ttl compatible i/o high density package ? 60 pin zip, no. 158 ? common data inputs and outputs single +5v (10%) supply operation pin names a?-a16 address inputs e?-e2 chip enables w?-w2 write enables g?-g2 output enables dq?-dq23 common data input/output vcc power (+5v10%) vss ground nc no connection electronic designs incorporated ? one research drive ? westborough, ma 01581usa ? 508-366-5151 ? fax 508-836-4850 ? electronic designs europe ltd. ? shelley house, the avenue ? lightwater, surrey gu18 5rf united kingdom ? 01276 472637 ? fax: 01276 473748 a?-a16 w? g? e? w1 g1 e1 w2 g2 e2 dq?-dq7 dq8-dq15 dq16-dq23 17 8 8 8 vcc e? dq? dq2 vss dq5 dq7 a16 a14 a12 g1 w1 dq8 dq10 vss dq13 dq15 a10 a8 a6 a5 a3 a1 vss dq17 dq19 dq20 dq22 g2 w2 g? w? dq1 dq3 dq4 dq6 vss a15 a13 a11 e1 vss dq9 dq11 dq12 dq14 vss a9 a7 vss a4 a2 a? dq16 dq18 vss dq21 dq23 e2 vcc 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 128kx24 zip module pinout 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
2 EDI8F24128C rev. 5.0 4/96 eco #7470 EDI8F24128C 128kx24 sram module absolute maximum ratings* recommended dc operating conditions dc electrical characteristics parameter sym conditions min typ* max units operating power icc1 w, e = vil, ii/o = 0ma, - 450 680 ma supply current min cycle standby (ttl) power icc2 e ? vih, vin - vil -- 25 100 ma supply current vin ? vih full standby power icc3 e ? vcc-0.2v - 10 40 ma supply current vin ? vcc-0.2v cmos vin - 0.2v input leakage current ili vin = 0v to vcc -- -- 15 a output leakage current ilo v i/o = 0v to vcc -- -- 10 a output high voltage voh ioh = -4.0ma 2.4 -- -- v output low voltage vol iol = 8.0ma -- -- 0.4 v (f=1.0mhz, vin=vcc or vss) parameter sym max unit ac test conditions *stress greater than those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. parameter sym min typ max units supply voltage vcc 4.5 5.0 5.5 v supply voltage vss 0 0 0 v input high voltage vih 2.2 -- 6.0 v input low voltage vil -0.3 -- 0.8 v (note: for tehqz,tghqz and twlqz, cl = 5pf) voltage on any pin relative to vss -0.5v to 7.0v operating temperature ta (ambient) commercial. 0c to +70c industrial -40c to +85c storage temperature, plastic -55c to +125c power dissipation 4.0 watts output current. 20 ma input pulse levels vss to 3.0v input rise and fall times 5ns input and output timing levels 1.5v output load 1ttl, cl = 30pf address pins ci 30 pf data pins cd/q 15 pf control pins (e, w, g) cc 15 pf these parameters are sampled, not 100% tested. e w g mode output power h x x standby high z icc2/icc3 l h l read dout icc1 l l x write din icc1 l h h deselect high z icc1 output *typical: ta = 25c, vcc = 5.0v truth table capacitance
EDI8F24128C 128kx24 sram module 3 EDI8F24128C rev. 5.0 4/96 eco #7470 ac characteristics read cycle symbol 20ns 25ns 35ns parameter jedec alt. min max min max min max units read cycle time tavav trc 20 25 35 ns address access time tavqv taa 20 25 35 ns chip enable access telqv tacs 20 25 35 ns chip enable to output in low z (1) telqx tclz 3 3 3 ns chip disable to output in high z (1) tehqz tchz 10 12 15 ns output hold from address change tavqx toh 3 3 3 ns output enable to output valid tglqv toe 13 15 20 ns output enable to output in low z (1) tglqx tolz 0 0 0 ns output disable to output in high z(1) tghqz tohz 8 10 12 ns note 1: parameter guaranteed, but not tested. tghqz telqv telqx e g q tehqz a tavav tglqv tglqx tavqv read cycle 2 - w high read cycle 1 - w high, g, e low tavav tavqv tavqx data 2 a q address 1 address 2 data 1
4 EDI8F24128C rev. 5.0 4/96 eco #7470 EDI8F24128C 128kx24 sram module note 1: parameter guaranteed, but not tested. symbol 20ns 25ns 35ns parameter jedec alt. min max min max min max units write cycle time tavav twc 20 25 35 ns chip enable to telwh tcw 15 20 30 ns end of write twleh tcw 15 20 30 ns address setup time tavwl tas 0 0 0 ns tavel tas 0 0 0 ns address valid to tavwh taw 15 20 30 ns end of write taveh taw 15 20 30 ns write pulse width twlw h twp 15 20 25 ns teleh twp 15 20 25 ns write recovery time twhax twr 0 0 0 ns tehax twr 0 0 0 ns data hold time twhdx tdh 3 3 3 ns tehdx tdh 3 3 3 ns write to output in high z (1) twlqz twhz 0 10 0 12 0 15 ns data to write time tdvwh tdw 12 15 20 ns tdveh tdw 12 15 20 ns output active from end of write(1) twhqx twlz 3 3 3 ns write cycle 1 - w controlled a w e d q tavav tavel tehax tdveh tehdx teleh taveh data valid high z twleh ac characteristics write cycle
EDI8F24128C 128kx24 sram module 5 EDI8F24128C rev. 5.0 4/96 eco #7470 package no. 158 60 lead zip package description 0.100 typ 0.590 0.555 3.065 max 0.175 0.125 0.050 0.022 0.018 0.253 0.205 0.050 0.100 typ 0.050 typ write cycle 2 - e controlled a e w d q tavav telwh tavwh twlwh tavwl tdvwh twhdx twhqx high z twlqz data valid twhax part number speed package (ns) no. EDI8F24128C20mzc 20 158 EDI8F24128C25mzc 25 158 EDI8F24128C35mzc 35 158 ordering information electronic designs incorporated ? one research drive ? westborough, ma 01581usa ? 508-366-5151 ? fax 508-836-4850 ? electronic designs europe ltd. ? shelley house, the avenue ? lightwater, surrey gu18 5rf united kingdom ? 01276 472637 ? fax: 01276 473748 electronic designs inc. reserves the right to change specifications without notice. cage no. 66301
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